The invention relates to a mold, and especially, a mold for a semiconductor chip.
One recently developed semiconductor package is the quad, flat, no-lead package sometimes known as a QFN package. QFN packages generally fall into one of two categories, either matrix QFN or block QFN. In both types of package the substrate to which the die (or semiconductor chip) is attached is normally a metal lead frame.
A typical lead frame 7 for a matrix QFN is shown in FIG. 1. For the matrix QFN package a single die is attached to each die pad 8 and during molding, each die is located within its own mold cavity. Hence, each die is individually encapsulated on the lead frame 7. After molding, the lead frame 7 is singulated by cutting the metal of the lead frame between each encapsulated die.
A typical lead frame 90 for a block QFN is shown in FIG. 9. The lead frame 90 has four separate blocks 91 and each block 91 has a square array of die pads to which a die is attached. During molding, all the dies on the die pads 92 in the same block 91 are located in the same mold cavity. Hence, all the dies in the same block are encapsulated in the same block of molding and singulation is performed by cutting through the lead frame 90 and the molding material between the dies in a block 91.
In both matrix and block QFN packages the overall size of the package is close to the size of the semiconductor chip located within the package. In addition, QFN packages are lead frame based packages and have an exposed die paddle. Hence, QFN packages enable good electrical performance and thermal characteristics, as the exposed die paddle can be used as a ground plane and a heat sink.
However, one problem with QFN packages, and indeed other semiconductor packages which are molded on only one side of the substrate, is the problem of epoxy flash seeping onto the other side of the lead frame during the molding operation.
In accordance with a first aspect of the present invention, there is provided a mold for a semiconductor chip comprising two mold halves, one mold half comprising sealing means adapted to exert a sealing pressure between a surface of the mold and a surface of a substrate located in the mold during a molding operation.
In accordance with a second aspect of the present invention, there is provided a method of molding material around a semiconductor chip mounted on a substrate, the method comprising inserting a substrate having a semiconductor chip mounted on a mounting portion of the substrate into a mold, closing the mold halves and applying a sealing pressure between a surface of the mold and a surface of the substrate to substantially prevent molding material entering between the surfaces of the mold and the substrate; injecting a molding material into the mold cavity to be molded around the semiconductor chip; after the molding operation has been completed, separating the mold halves and removing the sealing pressure between the surfaces of the mold and the substrate; and removing the molded semiconductor chip and substrate from the mold.
Preferably, the mold surface contacting the surface of the substrate is a compressible, and is typically elastically deformable. For example, the surface may comprise an elasticity deformable material, such as rubber or an elastomeric material.
In one example of the invention, the sealing means may comprise a suction means formed in the mold surface contacting the surface of the substrate. Typically, this may be provided by holes in the mold surface which are coupled to a vacuum generating device which when activated, causes the surface of the substrate to be sucked against the mold surface.
Preferably, the holes are arranged such that there is a substantially uniform sealing pressure across the surfaces.
In addition, or alternatively, the surface of the mold and/or the substrate may be configured such that when the mold halves are closed, the surface of the substrate is forced against the surface of the mold to generate the sealing pressure.
Preferably, the surface of the substrate to which the sealing pressure is applied is a surface of the mounting portion opposite the surface of the mounting portion on which the semiconductor chip is mounted.
In accordance with a third aspect of the present invention, there is provided a substrate for mounting a semiconductor chip thereon, the substrate comprising a mounting portion adapted to have a semiconductor chip mounted on a first surface of the mounting portion, and a second surface of the mounting portion, opposite the first portion, including a recess extending continuously around the second surface, and the recess being adjacent to and within the edge of the second surface.
Preferably, the substrate of the third aspect is for use with the mold of the first aspect and the method of molding of the second aspect.
Preferably, the substrate is a lead frame, and typically comprises a metal material.
Typically, the substrate is for a quad, flat, no-lead (QFN) semiconductor package.
Typically, there are two or more recesses extending around the second surface, one recess being closer to the edge of the second surface than the other recess. Preferably, the grooves are spaced apart from each other and typically, are substantially parallel.